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Weekly News | Supply Chain Trends in Semiconductor Industry
发布日期:2023-12-11

01 Company Trend(Dec. 4)


Rumor says Apple failed to develop its 5G modem chip, with many years of efforts going futile!


Apple has been attempting to develop its own in-house 5G modem chip, aiming to reduce dependence on Qualcomm. However, according to a new report, it seems that Apple decided to stop developing its own in-house 5G modem chip, and will still rely on Qualcomm’s chips. At present, the new report has not yet been confirmed, but similar information has been reported by various sources.
According to the report of "yeux1122" on the Naver blog, Apple is in the process of winding down its development of 5G modem chip, and will extend its deal extended its deal for Qualcomm modem chips. According to the report, sources familiar with Apples 5G modem chip department said that the companys efforts had failed and believed that it would be appropriate to close the department.
This decision will cost Apple a lot, as Apple has invested billions in developing their own technologies over many years. In addition, the leaker known as @Tech_Reve said that Apples attempts to develop its own modem chip have been hampered by major issues related to unrealistic goals and an inadequate understanding of the challenges involved.

Comments

Apple was ambitious in developing the project, and hired thousands of engineers for its custom 5G modem chip. In addition, Apple acquired Intels smartphone modem business and engaged the staff in developing 5G modem chip continuously. In addition, Apple also hired engineers from Qualcomm to support the development project. There are rumors that Apples 5G modem chip is in the early stages, and it may lag behind Qualcomm by years.
This may be the one of the factors leading Apple to ceasing working on 5G modem chip development. In the very beginning, Apple planned to develop a standalone chip, but hoped to eventually develop an SoC. This information has not been confirmed, but similar information has been reported by multiple sources. Please keep a prudent attitude to the rumors, as the final decision is in Apples hand.



02 Company Trend(Dec. 4)


TSMC exclusively won QUALCOMM’s order for 3nm again!


According to the report of Taiwan Economic Daily News, TSMC exclusively won the order of 3 nm chips from QUANTONG! Samsung has launched its 3nm GAA technology for more than a year, and the yield of wafers is still not satisfying. According to industry news, Qualcomm has canceled its strategy of working with both TSMC and Samsung simultaneously to create the 3nm version of its Snapdragon 8 Gen 4 chip and will only source it from TSMC instead. According to the estimate of the legal person, TSMCs monthly capacity of the 3nm chips (including N3E) in H2 next year is expected to rise to 100,000 pcs as customers such as Qualcomm and Nvidia are competing to source from TSMC.

It is widely believed in the industry that TSMCs customer base demanding 3nm process chips continues to expand, which will play back the customer queues again, continuously reflecting the dividends enjoyed by technology leaders, and the economic advantage of mass production will serve as a revenue driver for TSMC from 2024 to 2025. For the rumor, Qualcomm did not give any explanation, while TSMC did not comment on specific customer’s business and market rumors.

It is rumored that TSMCs 3 nm technology will be exclusive to Apple for "at least a year" before. In addition to Apple, Marvell previously issued a press release stating that it had already worked with TSMC on 3nm process technology; recently MediaTek also announced both sides would work together on 3nm process technology. It is rumored that Qualcomm’s Snapdragon 8 Gen 4 chips will be only sourced from TSMC in 2024,showing that its 3nm customer base continues to expand.

Comments

TSMCs mass production on its 3nm process technology started smoothly in Q4 last year, and the trend of its application in the end market continues to be the focus of the industry. Recently, Samsung’s fab has been actively snatching back orders from large customers. In H1 of this year, Qualcomm originally expected to restart its dual-sourcing strategy by sourcing its Snapdragon Gen 4 chips from TSMC and Samsung simultaneously next year, but according to the latest industry news, Samsung may not be able to meet Qualcomms demand for the number of wafers to be taped out due to its conservative attitude in planning its 3nm process expansion next year, and therefore Qualcomm will return to only source its chips from TSMC, which is expected to boost TSMCs 3-nm process capacity next year. Qualcomm will not return to its dual-sourcing strategy until 2025 at the earliest.


03 Market Trend(Dec. 5)


DRAM & NAND Flash prices start to rise again!


According to news on December 5, with the major DRAM chip fabs’ strategy of cutting output to underpin the price proves effective, Samsung and other fabs clearly announced that they would continue to cut production in Q4. Coupled with the recovering of some end-markets, the NAND flash market begins to pick up and the price is rising. Insiders said that customers have been purchasing goods more actively, but due to the reduction of output by major fabs, it is expected that there will be a shortage of goods next year.

According to the latest study by TrendForce, mobile DRAM and NAND Flash contract prices are expected to rise in Q4, which will extend into Q1 next year. Of which, the quarterly increase in mobile DRAM contract prices in Q4 is estimated to be 13-18%. Regarding NAND Flash, the contract price of eMMC, UFS in Q4 increased by about 10-15%.

In addition, as for NAND flash chips, Western Digital expects prices to rise periodically in the coming quarters, and the cumulative increase may be more than 50% higher than the current price, up to 55%. According to statistics, Samsung’s share of global NAND chip market ranked first in 2022, followed by Kioxia and then by SK Hynix, and Western Digital ranked fourth, with a market share of about 12.7%.

Comments

This wave of price rise was mainly caused by the following reasons. On the supply side, with the further output reduction of Samsung and other international storage fabs, for example, Mircon even continues cutting its output to 2024, the industry estimates that the market will bounce up clearly due to the main factors such as the downsizing of supply, AI demands, and DDR5 going to be the mainstream technical specification.

As for the demand side, the industry estimates that the market will bounce up clearly due to the main factors such as the downsizing of supply, AI demands, and DDR5 going to be the mainstream technical specification.


04 Policy Trend(Dec. 6)


Taiwan included 14nm and smaller process node chips in "Export Control List" to prohibit their use in Chinese mainland


According to the report of Economic Daily News, Taiwans "NSTC" announced yesterday that it has listed 22 technologies in the key and core technology list. The most concerned is that the semiconductor technology of wafer manufacturing process smaller than 14 nm process node, its key consumables, heterogeneity integration/silicon photon integration packaging and other semiconductor technologies were included in the control list to prevent the illegal outflow of industrial goods from causing damage to industrial interests. If there is any illegal disclosure, the judicial unit will investigate it.
The "NSTC" of Taiwan announced that the contents of the first list included technologies that have dominant advantages and need urgent protection, covering fields like national defense science and technology, space, agriculture, semiconductor, information security, etc. As for semiconductor technology of the most concern, the announcement revealed that IC manufacturing technology for processes smaller than 14 nm, its key gas, chemicals and equipment technology, and its heterogeneous integrated packaging technology, wafer-class packaging technology, Silicon photon integration packaging technology and its special essential materials and equipment technology are the key and core technologies. In addition, as chip security technology, post-quantum cryptography technology, and network active defense technology involve information, they are listed in key and core technologies.

Comments

The new rule may affect the future process improvement of TSMC’s Nanjing plant, and heterogenous integration/silicon photon integration package are the core technologies of the packaging industry, and will have an impact on the investment layout of TSMC and ASE Technology. At present, TSMCs Nanjing plant is mainly adopting 16/28nm process node technology, and the company always abides by the rule, and ASE Technology also follows the government’s policy guidance.

Taiwan said that the list of key and core technologies is designed to ensure security and competitive advantage of the industry, and to strengthen protecting the business secrets involving key and core technologies, aiming to prevent illegal outflows from damaging to the industrial interests, which has no impact on legal business practices and technology exchanges. However, in the case of any illegal disclosure, the judicial unit will investigate it. In addition, if business secrets listed as key and core technologies are stolen by economic espionage, they can be investigated by the procuratorial organs in accordance with the law, and their penalties will be increased.



05 Trends of somedomestic industries


1. SinTone and Tianjin Jinnan District signed strategic cooperation agreement on photonic chip industry project(Dec. 4)

According to the news of the official website of Jinnan District Peoples Government of Tianjin City, Tianjin City Investment Group, Jinnan District Peoples Government and Zhongke Xintong Microelectronics Company "SinTone") held the signing ceremony for the strategic cooperation agreement on the photonic chip industry project. The three sides will jointly give play to their respective advantages and focus on creating a photoelectron industry cluster zone to contribute to the construction of the innovation and transformation landscape of "R&D in Beijing - Manufacturing inTianjin".
The Chairman of SinTone said that the company will work with Tianjin City Investment Group and Jinnan District to build the domestic only and international leading multi-material photonic chip production line. It is reported that the photonic chip project signed this time is expected to break the technological monopoly of foreign chip enterprises and provide technological empowering and unlimited possibilities to realize the lane changing and overtaking of domestic chip industry and provide strong support for the "369"key industries in Jinnan District.
Data show that Zhongke Xintong Microelectronics (Beijing) Company or SinTone is a high-tech enterprise engaged in R&D of photon technology, photonic chip and system manufacturing, has leading advantages in "multi-material, cross-size" photonic chip technology field, and can provide photonic chip wafer services for all kinds of customers in Chinas photon field to support related field industry development.


2. BIWIN signed wafer-grade advanced packaging and testing manufacturing project(Dec. 4)

Recently, BIWIN Storage Technology Company Limited ("BIWIN") officially signed to build a wafer-grade advanced packaging and testing manufacturing project at Dongguan Songshan Lake Hi-Tech Industrial Development Zone. It is reported that the wafer-grade advanced packaging and testing project of BIWIN is its forward-looking layout to meet the needs of advanced storage and storage & logic integration technology, aiming at setting a benchmark for advanced packaging and testing in the Greater Bay Area. At the same time, the project can help the company to achieve greater bandwidth, higher speeds, more flexible heterogeneous integration, lower energy consumption and enable customers in the fields of mobile consumer electronics, high-end supercomputing, gaming, artificial intelligence and IoT applications.
BIWIN said that it would actively promote win-win cooperation with IC design manufacturers, wafer fabs and end users and other industrial chain partners, contribute to complementing and strengthening the IC industry chain of the Greater Bay Area, and increase the IC industry scale and technological level.
The official data show that BIWIN has mastered advanced packaging processes for 16 layers Die, 30 ~ 40 μm ultra-thin Die, multi-chip heterogeneous integration to support the innovation and mass production of NAND, DRAM chips and SiP products. At present, BIWIN has built a complete and professional advanced packaging and operation team with international vision, and worked with Guangdong University of Technology to establish strategic partnership to build the National Key Laboratory of Precision Electronic Manufacturing Technology and Equipment (GDUT Naitonal Key Laboratory) to jointly promote the development of wafer-grade advanced packaging and testing technology, enable implementation of projects and achieve commercial success in the Greater Bay Area.


3. XEPIC and formally established strategic cooperation(Dec. 4)

According to the news of its official Wechat account, XEPIC, or Accelerating EDA Pioneer Innovation Center, a system-level validation EDA solution provider, and SiEngine Technology, a domestic high-end automotive electronic chip design company, formally established strategic cooperation relationship. SiEngine Technology will bring in the EDA validation tool of XEPIC to enable the collaborative development of automotive chips and application software to shorten product-to-market time on a large scale and speed up the innovation of next-gen smart driving chips.

It is learned that SiEngine Technology, as the only manufacturer producing 7 nm automotive chips in China, has applied its "Longying 1" to Gili LYNK&CO 08 and other car models on a large scale. With the help of XEPIC’s EDA validation tool, SiEngine Technology is able to conduct joint simulation and debugging of system-level hardware and software in real-world like scenarios during the chip design stage, thus improving the collaborative performance of hardware and software in system-level application environment and reducing the risks in applying chips in complete vehicles.

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